Lightweight asynchronous scheduling in heterogeneous reconfigurable systems

The trend for heterogeneous embedded systems is the integration of accelerators and general-purpose CPU cores on same die. In these integrated architectures, like Zynq UltraScale+ board (CPU+FPGA) that we target in this work, hardware support shared memory low-overhead synchronization between accelerator make case exploring strategies exploit a tight collaboration CPUs accelerator. paper propose novel lightweight scheduling strategy, FastFit, targeted to FPGA accelerators, new scheduler based it, named MultiFastFit, which asynchronously tackles comprised variety IPs. Our strategy significantly reduces overhead automatically compute near-optimal chunksizes when compared previous state-of-the-art auto-tuned approach, makes our approach more suitable fine-grained applications. Additionally, MultiFastFit has been designed enable efficient co-execution work among devices such way all are busy while minimizing load unbalance. approaches have evaluated using four benchmarks carefully tuned low-power platform. experiments demonstrate FastFit always finds chunksize any device configuration at reasonable cost, even irregular applications, CPU+FPGA co-executions usually faster energy than CPU-only FPGA-only executions. We also with other strategies, finding it outperforms up 2x achieves similar results manually-tuned schedulers without requiring an offline search ideal CPU-FPGA partition or chunk granularity.